1. Field of the Invention
The present invention relates to a display device and a method for manufacturing the same.
2. Description of the Related Art
In flat panel displays, a thin film transistor (TFT) is used as a switching element. In a bottom-gate TFT, a gate electrode is disposed on a substrate, and a gate insulating film is formed on the substrate so as to cover the gate electrode. A convex portion is formed on the substrate due to the presence of the gate electrode, and the gate insulating film has a surface shape conforming to the surface shape of the convex portion as a base because of the characteristic of the deposition process. That is, the gate insulating film has a portion (step) that changes in height from the periphery of the gate electrode along the surface of the gate electrode. In other words, the gate insulating film has the step above the edge of the gate electrode.
JP 2010-278077 A discloses a structure in which a channel protective layer is provided and a semiconductor layer composed of amorphous silicon or polysilicon is arranged inside the periphery of a gate electrode. In this structure, since the semiconductor layer is located inside the periphery of the gate electrode, the semiconductor layer is not present on a step of a gate insulating film.
JP 2011-166135 A discloses a structure in which a channel protective layer is provided and an oxide semiconductor layer is extended to the outside of a gate electrode. In this structure, since the semiconductor layer is located outside the gate electrode, the semiconductor layer is present on a step of a gate insulating film.
When it is intended to realize the structure disclosed in JP 2010-278077 A with an oxide semiconductor, the gate insulating film is also reduced in thickness during processing of the channel protective layer. The thinning of the gate insulating film causes a problem of a reduction in dielectric withstand voltage.
In the structure disclosed in JP 2011-166135 A, the semiconductor layer is also formed at a portion where a reduction in dielectric withstand voltage is particularly problematic, that is, above the step portion of the gate insulating film generated by the thickness of the gate electrode. Therefore, since the semiconductor layer serves as a protective layer during processing of the channel protective layer, a reduction in dielectric withstand voltage due to a reduction in thickness of the gate insulating film is not caused.
In a bottom-gate TFT, however, when a semiconductor layer is formed wider than a gate electrode, there arises a problem in that the light of a backlight is incident on the semiconductor layer to accelerate the deterioration of the semiconductor layer (channel) and thereby reduce the reliability.